In a RISC assembly program, a programmer wants to add two values stored in memory. What must happen before the addition can occur?
AThe ADD instruction can directly reference memory addresses as its operands
BThe values must be loaded into registers first, because arithmetic operations work only on register contents
CThe values must be converted to hexadecimal before the processor can handle them
DThe programmer must declare the memory addresses as variables at the start of the program
In RISC architectures, arithmetic instructions only operate on register contents — this is the load-store model. To add two values in memory, you must first use LOAD instructions to bring them into registers, then ADD the registers, then optionally STORE the result back. The ADD instruction cannot directly reference memory addresses (option A) in a load-store architecture. This constraint keeps the instruction set simple and the hardware fast.
Question 2 Multiple Choice
A student writes `lw $t0, 8($sp)`. Which addressing mode is this, and what does it do?
AImmediate addressing — it loads the constant 8 into register $t0
BRegister addressing — it copies the value of $sp into $t0, offset by 8 bits
CBase-plus-offset addressing — it loads the word in memory at address (sp + 8) into $t0
DIndirect addressing — it loads the word at the address stored in memory location 8
Base-plus-offset addressing computes a memory address by adding a constant offset to a register value. `lw $t0, 8($sp)` means: compute sp+8, read the word at that memory location, and put it in $t0. This mode is essential for accessing stack variables, array elements, and struct fields. Immediate addressing (option A) embeds a constant directly as an operand, not as an address offset.
Question 3 True / False
Assembly language and machine code are equivalent terms — both refer to the binary instructions a CPU executes.
TTrue
FFalse
Answer: False
This is the central misconception the topic addresses. Assembly language is a human-readable text representation of machine instructions — it uses mnemonics like ADD, LOAD, and BRANCH. Machine code is the binary encoding the CPU actually executes. An assembler translates assembly into machine code. They represent the same operations, but assembly is text; machine code is binary.
Question 4 True / False
In a RISC assembly program, all control flow — if-else, loops, and function calls — ultimately reduces to conditional and unconditional jump instructions.
TTrue
FFalse
Answer: True
Assembly has no structured control flow constructs — no if-else blocks, no for loops, no built-in function call syntax. All control flow is implemented through branch (conditional jump) and jump (unconditional jump) instructions combined with labels. `beq $t0, $zero, loop` is equivalent to 'if $t0 == 0, go to loop.' Everything else — loops, conditionals, function calls, returns — is built from this primitive.
Question 5 Short Answer
Why does the load-store model — where arithmetic happens only in registers and memory is accessed only through explicit load/store instructions — make hardware design simpler and faster?
Think about your answer, then reveal below.
Model answer: By restricting arithmetic to register contents, the CPU's execution units only need to handle a small, fixed set of fast storage locations rather than the vastly larger and slower memory space. Load and store instructions are explicitly sequenced, making memory access predictable. This separation allows the processor to execute arithmetic at register speed — orders of magnitude faster than memory access — while treating memory operations as their own distinct pipeline stage.
The load-store model is the defining characteristic of RISC architectures. It simplifies instruction decoding (every arithmetic instruction has the same format), enables pipelining (arithmetic and memory stages are separate), and allows the CPU to optimize register usage aggressively. The cost is that programmers must explicitly manage data movement — which is exactly why reading assembly reveals what a program is actually doing at the hardware level.