Questions: Binary Adders: Half-Adders and Full-Adders

Question 1

A half-adder receives inputs A=1 and B=1. What are its Sum and Carry outputs?

• A. Sum=1, Carry=1
• B. Sum=0, Carry=1
• C. Sum=1, Carry=0
• D. Sum=0, Carry=0

Answer: (B)

Sum = A XOR B = 1 XOR 1 = 0; Carry = A AND B = 1 AND 1 = 1. This mirrors binary arithmetic: 1 + 1 = 10 in binary, which is sum bit 0 with a carry of 1. The XOR gate produces 1 when inputs differ (which is false when both are 1), and the AND gate produces 1 only when both inputs are 1. Option A (Sum=1, Carry=1) is the most common wrong answer — students mistakenly apply OR logic to the sum.

Question 2

What is the fundamental performance limitation of a 64-bit ripple-carry adder?

• A. The carry-out of the most significant bit cannot be computed until the carry has propagated sequentially through all 64 stages
• B. The XOR gates used for sum bits are inherently slower than the AND gates used for carry bits
• C. Each full-adder must read both 64-bit operands simultaneously, creating a memory bottleneck
• D. The half-adder at bit position 0 introduces a one-stage delay that compounds across the chain

Answer: (A)

In a ripple-carry adder, each stage's carry-out feeds into the next stage's carry-in. Stage n-1 cannot produce its final sum until it receives the carry from stage n-2, which can't compute until it receives from n-3, and so on all the way back to stage 0. This sequential dependency means the total delay grows linearly with bit width — 64 gate delays in series. This is why carry-lookahead and carry-select adders were developed: they break the sequential dependency by computing carries in parallel.

Question 3

A full-adder with inputs A=1, B=0, Cin=1 produces a carry-out of 1.

• T. True
• F. False

Answer: True

Cout = 1 if two or more of the three inputs are 1. Here A=1 and Cin=1 (two inputs are 1), so Cout=1. The Sum = A XOR B XOR Cin = 1 XOR 0 XOR 1 = 0, giving a full result of 10 in binary (sum=0, carry=1). Equivalently: 1 + 0 + 1 = 2 = 10₂.

Question 4

In a multi-bit ripple-carry adder, a half-adder can be used at most bit position because most bit positions have the same inputs.

• T. True
• F. False

Answer: False

A half-adder only accepts two inputs (A and B) and cannot accept a carry-in. Only the least significant bit position (bit 0) has no carry-in (or a carry-in fixed at 0), so a half-adder is valid there. Every other bit position must receive the carry-out from the previous stage, requiring a full-adder with three inputs (A, B, Cin). Using a half-adder at bit position 1 or higher would silently discard the carry, producing wrong results for any addition that generates a carry from lower bits.

Question 5

Explain why a full-adder is necessary for multi-bit addition, and why the ripple-carry adder becomes slower as the number of bits increases.

Model answer: A full-adder is necessary because every column beyond the least significant one must accept a carry from the column to its right. A half-adder has no carry-in input, so it can only add two bits — it cannot account for the carry produced by the previous column. The full-adder's three inputs (A, B, Cin) allow it to handle this. In a ripple-carry adder, the carry-out of each stage feeds into the carry-in of the next stage sequentially. The most significant bit's result depends on the carry propagating through every preceding stage. With n stages each introducing a gate delay, the worst-case propagation time grows linearly with n — a 64-bit adder is 64 times slower than a 1-bit adder.

The sequential carry dependency is the root cause of ripple-carry's speed limitation. Carry-lookahead adders solve this by pre-computing whether each stage will 'generate' or 'propagate' a carry, enabling parallel carry computation. But the ripple-carry design remains the conceptual baseline because it directly maps the paper algorithm to hardware.