Questions: Microinstruction Format and Control Signals

Question 1

A processor designer claims that using microprogrammed control instead of hardwired control will make instruction execution faster. Why is this claim incorrect?

• A. Microprogrammed control uses wider datapaths, which increases instruction latency
• B. Microprogrammed control requires a lookup in the control store, adding latency that hardwired combinational logic avoids
• C. Microprogrammed control can only implement a small number of instructions
• D. Hardwired control processes multiple instructions simultaneously, giving it a throughput advantage

Answer: (B)

Hardwired control generates control signals directly from the instruction opcode through combinational circuits — no memory lookup required. Microprogrammed control must fetch the starting microprogram address, then step through the control store one microinstruction per cycle. This adds latency. The tradeoff runs the other direction: microprogramming buys flexibility (bugs can be patched in ROM) at the cost of speed, which is why RISC architectures favor hardwired control while complex CISC designs historically used microprogramming.

Question 2

A microinstruction format uses 180 bits, where each bit directly enables or disables exactly one hardware control signal with no further decoding. Which design philosophy does this represent, and what is its key tradeoff?

• A. Vertical microinstruction — encoding multiple signals into smaller fields reduces word width
• B. Horizontal microinstruction — each bit maps directly to a wire, so no decode logic is needed, but words are very wide
• C. Hardwired control — combinational logic generates signals from the opcode without a control store
• D. Hybrid microinstruction — mutually exclusive signals are grouped into encoded fields to reduce width

Answer: (B)

Horizontal microinstructions give each control signal its own dedicated bit, eliminating any decoding step — simpler and faster to interpret, but the word width can be enormous (hundreds of bits). Vertical microinstructions encode groups of mutually exclusive signals into smaller fields that must be decoded, producing narrower words at the cost of an extra decoding stage. Most real designs use a hybrid: direct bits for independent signals, encoded fields for mutually exclusive ones (like ALU operation selection).

Question 3

A single machine instruction such as ADD corresponds to exactly one microinstruction.

• T. True
• F. False

Answer: False

A machine instruction typically requires a sequence of microinstructions — a microprogram — to execute. For example, ADD might require: (1) a fetch microinstruction to load the instruction from memory, (2) a decode/read microinstruction to retrieve operands and configure the ALU, and (3) a writeback microinstruction to store the result. Each microinstruction activates a different combination of control signals for one clock cycle. The microprogram for each machine instruction is stored starting at a specific address in the control store.

Question 4

Microprogrammed control is the preferred approach for RISC architectures because modifying microcode in ROM is easier than redesigning combinational logic.

• T. True
• F. False

Answer: False

RISC architectures use hardwired control, not microprogrammed. Their small, regular instruction sets make the combinational logic manageable — few instructions, all fixed-length and uniform in structure. The overhead of a control store lookup is not justified when the instruction set is simple enough to wire directly. Microprogramming's flexibility advantage is most valuable for CISC designs with large, irregular instruction sets where hardwiring every instruction variant would be prohibitively complex.

Question 5

Why does microprogrammed control make it easier to fix processor bugs after manufacturing, while hardwired control does not?

Model answer: In microprogrammed control, each machine instruction's behavior is defined by a sequence of microinstructions stored in a ROM (the control store). A behavioral bug in instruction execution is a bug in the microcode, and microcode can potentially be patched by reflashing the ROM without redesigning or re-fabricating the chip. In hardwired control, the logic is encoded directly in combinational circuits — the physical connections of gates and wires define behavior. Changing behavior requires physically redesigning the circuit and re-fabricating the chip, which is far more costly and not possible after deployment.

This is the practical reason CISC architectures like the x86 have historically used microprogramming: the ability to issue microcode patches for errata (CPU bugs discovered after shipping) without recalling hardware. Intel and AMD both use microcode updates distributed through the OS to patch certain CPU vulnerabilities and bugs — a direct consequence of the microprogrammed control architecture.