Questions: Paging and Page Tables

5 questions to test your understanding

Score: 0 / 5
Question 1 Multiple Choice

A paging system uses 4 KB pages (12-bit offset). A process issues logical address 0x000050B3. The page table shows page 5 → frame 200. What is the physical address?

A0x000050B3 — the MMU passes the logical address through unchanged on a TLB hit
BFrame 200 concatenated with offset 0x0B3, giving physical address 0x000C80B3
C200 × 4096 + 0x50B3, which adds the full logical address to the frame base
DThe offset 0x0B3 is added to frame 200, giving physical address 200 + 0x0B3
Question 2 Multiple Choice

Why is the Translation Lookaside Buffer (TLB) essential for making paging practical rather than merely a performance optimization?

AWithout the TLB, the page table cannot store entries for more than 1024 pages, limiting address space
BWithout the TLB, every memory access requires two memory accesses — one to read the page table, one to read the actual data — effectively doubling the cost of every instruction and data reference
CWithout the TLB, the MMU cannot distinguish page faults from valid translations
DWithout the TLB, processes could read each other's page tables, violating memory isolation
Question 3 True / False

Paging mostly eliminates memory fragmentation.

TTrue
FFalse
Question 4 True / False

In a paging system, the offset portion of a logical address is passed through unchanged to become the low-order bits of the physical address.

TTrue
FFalse
Question 5 Short Answer

Explain what problem paging solves that contiguous memory allocation cannot, and describe the new (minor) problem paging introduces.

Think about your answer, then reveal below.