Questions: Virtual Memory and Paging

Question 1

A program accesses virtual address 0x5000. The TLB has no entry for this page, but the page table shows the page IS present in physical memory. What happens?

• A. A page fault occurs and the OS loads the page from disk
• B. The hardware walks the page table, finds the frame number, loads the mapping into the TLB, and the access succeeds — no page fault
• C. The program crashes because a TLB miss means the page is inaccessible
• D. The OS suspends the program until the TLB has an available slot

Answer: (B)

A TLB miss means the mapping is not cached in the TLB — not that the page isn't in physical memory. The hardware performs a page table walk, finds the physical frame number, loads the entry into the TLB, and the memory access completes without OS involvement. A PAGE FAULT only occurs when the page is actually absent from physical memory (stored on disk or never loaded). TLB miss ≠ page fault.

Question 2

Process A writes data to its virtual address 0x1000. Process B also uses virtual address 0x1000. What does virtual memory guarantee about these accesses?

• A. They access the same physical location, which is protected by a lock the OS manages
• B. The OS prevents any two processes from using overlapping virtual addresses
• C. Each process has its own page table mapping its virtual addresses to separate physical frames, so they are fully isolated
• D. The TLB arbitrates which process gets priority when virtual addresses collide

Answer: (C)

Memory isolation is a core purpose of virtual memory. Each process has its own page table, mapping its private virtual address space to different physical frames. Two processes can use the same virtual address without conflict or even awareness of each other. This abstraction is foundational to modern OS security and stability.

Question 3

The primary purpose of virtual memory is to allow programs to use more total memory than physically fits in RAM by storing excess pages on disk.

• T. True
• F. False

Answer: False

While virtual memory does enable programs to address more memory than physical RAM, this understates its purpose. Virtual memory also provides memory isolation between processes (each process has a private address space), enables memory-mapped files, and supports memory protection — all independently valuable even on systems with abundant RAM. Reducing virtual memory to 'disk as RAM' misses its most foundational contribution.

Question 4

The Translation Lookaside Buffer (TLB) is a hardware cache for page table entries, and a TLB hit allows address translation without accessing the page table in main memory.

• T. True
• F. False

Answer: True

The TLB stores recently used virtual-to-physical page mappings. On a TLB hit, the hardware retrieves the frame number in a single fast lookup — typically sub-nanosecond — without doing the full page table walk (which requires multiple memory accesses). This is the same caching principle as the rest of the memory hierarchy, now applied to address translation itself.

Question 5

Why is a TLB miss not the same as a page fault, and what happens in each case?

Model answer: A TLB miss means the virtual-to-physical mapping is not cached in the TLB, but the page may still be in physical memory. The hardware walks the page table in RAM, finds the frame number, loads it into the TLB, and the access completes — no OS involvement, relatively cheap. A page fault occurs when the page is not in physical memory at all (it is on disk or has never been loaded). The hardware traps to the OS, which locates the page on disk, loads it into a free frame, updates the page table, and restarts the instruction. Page faults are expensive (disk I/O); TLB misses are not.

Confusing TLB misses with page faults is a common error. The distinction matters because they involve very different mechanisms and costs: a TLB miss is handled entirely in hardware or through a fast table walk, while a page fault requires full OS intervention and disk I/O that is millions of times slower.