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Register Allocation

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register-allocation code-generation architecture

Core Idea

Register allocation assigns variables to CPU registers and memory locations. A variable can use a register if its live ranges don't overlap with other variables' (no two live variables can share a register). This is modeled as a graph coloring problem: variables are nodes, edges connect interfering variables, and colors are registers. Spilling (moving to memory) is required when coloring exceeds available registers.

Explainer

After the compiler generates intermediate code, every temporary variable and user variable needs a home in the machine. Registers are the fastest storage a CPU has — an operation on registers can complete in a single cycle, while a memory access may cost dozens of cycles or more. Register allocation is the compiler phase that decides which variables live in registers and which get demoted to slower memory (the stack), directly determining how fast the generated code will run.

The problem connects two concepts you already know. From live variable analysis, you can determine for each point in the program which variables are simultaneously "alive" — meaning their current values will be used before being overwritten. Two variables that are live at the same time interfere: they cannot share a register because both values must be accessible. The compiler builds an interference graph where each variable is a node and an edge connects every pair of variables that interfere. The question then becomes: can you assign one of *k* colors (registers) to each node such that no two adjacent nodes share a color? This is exactly the graph coloring problem.

Graph coloring with *k* colors is NP-complete in general, but compilers use a remarkably effective heuristic. The key insight is that any node with fewer than *k* neighbors can always be colored: no matter what colors its neighbors use, at least one color remains available. The algorithm repeatedly removes such low-degree nodes from the graph (pushing them onto a stack), simplifying the graph until it is empty or only high-degree nodes remain. Then it pops nodes off the stack and assigns colors — each node's neighbors are already colored, and by construction a valid color exists. When a node cannot be removed because all remaining nodes have *k* or more neighbors, the compiler must spill one variable to memory, inserting load and store instructions around its uses.

Choosing which variable to spill is a critical decision. A variable used inside a deeply nested loop is expensive to spill because every load and store happens on each iteration. A variable used once outside any loop is cheap to spill. Good allocators use cost heuristics that weigh use frequency, loop depth, and the number of interferences. Some allocators also coalesce — if a copy instruction `x = y` exists and `x` and `y` don't interfere, they can be assigned the same register, eliminating the copy entirely. The interplay between spilling, coalescing, and coloring makes register allocation one of the most studied and practically impactful optimizations in compiler design.

Practice Questions 5 questions

Prerequisite Chain

Understanding Zero → The Number Zero → Counting to Five → Counting to 10 → Counting to 20 → Counting a Set of Objects Up to 20 → Cardinality: The Last Number Counted → Matching Numerals to Quantities → Subitizing Small Quantities → Addition Within 10 → Number Bonds to 10 → Addition Within 20 → Doubles and Near Doubles → Doubles Facts Within 10 → Near Doubles Facts Within 20 → Mental Math Strategies for Addition → Mental Math: Adding and Subtracting Tens → Addition Within 100 → Repeated Addition as Multiplication → Multiplication as Equal Groups → Multiplication: Arrays → Basic Multiplication Facts (0s, 1s, 2s, 5s, 10s) → Multiplication Facts Within 100 → Division as Equal Sharing → Division as Grouping (Measurement Division) → Division: Grouping (Repeated Subtraction) Model → Division: Fair Sharing Model → Division as Equal Sharing → Division as Grouping → Basic Division Facts → Division Facts Within 100 → Multiplication and Division Fact Families → Relationship Between Multiplication and Division → Division Facts as Inverse of Multiplication → Remainders and Quotients in Division → Division Word Problems → Multi-Step Word Problems → Solving Multi-Step Word Problems → Multiplication Word Problems → Division Word Problems → Introduction to Long Division → Factors and Multiples → Prime and Composite Numbers → Equivalent Fractions → Relating Fractions and Decimals → Decimal Place Value → Integers and the Number Line → Comparing and Ordering Integers → Absolute Value → Adding Integers → Subtracting Integers → Multiplying Integers → Introduction to Exponents → Order of Operations → Integer Order of Operations → Variable Expressions → The Distributive Property → Variables and Expressions Review → Introduction to Polynomials → Adding and Subtracting Polynomials → Multiplying Polynomials → Factorial → Permutations → Combinations → Counting Principles: Addition and Multiplication Rules → Introduction to Graph Theory → Propositional Logic Foundations → Logical Equivalences → Boolean Algebra → Boolean Type and Truth Values → Comparison Operators and Boolean Tests → Logical Operators and Boolean Algebra → Boolean Algebra and Fundamental Laws → Logic Gates Fundamentals → Implementing Boolean Functions with Gates → Karnaugh Map Simplification → Combinational Circuit Design → Flip-Flops and Latches → Finite State Machines (FSMs) → Deterministic Finite Automata (DFA) → Nondeterministic Finite Automata (NFA) → Two-Way Finite Automata → NFA to DFA Conversion (Subset Construction) → DFA Properties and Minimization Algorithms → Regular Languages: Definition and Characterization → Context-Free Grammars (CFGs) → Context-Free Grammar Properties and Ambiguity → Parse Trees, Derivations, and Ambiguity in CFGs → Context-Free Grammars in Compiler Design → Abstract Syntax Trees (ASTs) → Symbol Tables and Scope Resolution → Semantic Analysis Phase → Intermediate Code Representation → Control Flow Graphs → Fixpoint Computation and Iteration → Dataflow Analysis → Live Variable Analysis → Register Allocation

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