Surface codes are a family of topological stabilizer codes defined on a 2D lattice, where qubits live on edges and stabilizers are local plaquette and vertex operators. The toric code encodes 2 logical qubits on a torus; the planar surface code encodes 1 logical qubit with boundary conditions. Surface codes are the leading candidates for practical quantum error correction because they require only nearest-neighbor interactions on a 2D grid, have high error thresholds (~1% per gate), and allow efficient syndrome decoding. The price is a large overhead: an [[n,1,d]] surface code uses n = O(d^2) physical qubits for distance d.
Surface codes translate quantum error correction into a geometric problem on a lattice. Consider a 2D square grid where qubits live on the edges of the lattice. Each face (plaquette) defines a Z-type stabilizer: the product of Z operators on all four edges bounding that face. Each vertex defines an X-type stabilizer: the product of X operators on all edges meeting at that vertex. All these operators commute (every edge is shared by exactly two faces and two vertices, and X and Z anticommute, but each edge appears an even number of times in any product of stabilizers from different types, canceling the sign). The code space is the +1 eigenspace of all stabilizers.
The toric code places this lattice on a torus (periodic boundary conditions), encoding 2 logical qubits. The planar surface code uses a square lattice with two types of boundaries (rough and smooth), encoding 1 logical qubit. Logical operators are non-contractible loops: logical X is a chain of X operators connecting two rough boundaries, and logical Z is a chain of Z operators connecting two smooth boundaries. These chains commute with all stabilizers but are not products of stabilizers, so they act nontrivially on the encoded qubit.
The practical appeal of surface codes lies in their locality and threshold. Each stabilizer involves only 4 qubits arranged in a local pattern, requiring only nearest-neighbor couplings on a 2D chip — this matches the geometry of superconducting qubit arrays that Google, IBM, and others are building. The error threshold is approximately 1% per gate, meaning that if physical gates have error rates below 1%, increasing the lattice size exponentially suppresses logical errors. Below threshold, the logical error rate scales as approximately (p/p_th)^(d/2) where d is the code distance (the shorter lattice dimension). A distance-17 surface code with 0.1% physical error rate achieves a logical error rate below 10^(-12).
The main drawback is overhead: a distance-d surface code uses O(d^2) physical qubits to encode a single logical qubit. Running Shor's algorithm to factor a 2048-bit number might require thousands of logical qubits, each needing thousands of physical qubits — millions of physical qubits total. Furthermore, universal gate sets on surface codes are not straightforward: Clifford gates (H, S, CNOT) can be implemented transversally or via lattice surgery, but the T gate (needed for universality) requires magic state distillation, which is an additional overhead. Despite these costs, surface codes remain the most promising architecture for fault-tolerant quantum computing because their practical requirements align with current hardware capabilities.
No topics depend on this one yet.