Registers are arrays of flip-flops that store multi-bit values (often 32 or 64 bits), while register files are collections of named registers with multiplexed read and write ports. They provide fast, on-chip storage for operands and intermediate results.
Design a 4-register by 8-bit register file with dual read ports and single write port; trace address decoding and data paths.
Registers cannot hold different values per bit unless explicitly stored separately. Register file write typically takes one clock cycle and read is combinational.
You already know that a D flip-flop can store a single bit, latching a new value on each clock edge. A register is simply a group of D flip-flops wired to the same clock signal, allowing them to store a multi-bit value — a 32-bit register is 32 flip-flops operating in lockstep. When the clock edge arrives, all 32 bits update simultaneously from 32 parallel input lines. This gives the processor a tiny but extremely fast piece of storage that can capture and hold a data word for as long as needed.
A processor needs more than one register. The register file organizes multiple registers into a structured array with addressing logic, much like a small, fast memory. Each register gets a numeric address (for example, register 0 through register 31 in a typical RISC architecture). To read a register, you supply its address to a multiplexer that selects the corresponding register's outputs and routes them to a read port. Since this selection is purely combinational — just wires and multiplexers, no clock edge needed — reading a register is nearly instantaneous.
Writing to a register file requires more coordination. A decoder converts the write address into a one-hot signal that enables exactly one register's clock input, while all other registers ignore the incoming data. The write data lines are shared across all registers (they are a common bus), but only the selected register actually latches the value on the clock edge. This means writes take one clock cycle, while reads are available within the same cycle — an asymmetry that pipeline designers exploit to perform a read and a write to the register file in the same clock cycle.
Most register files provide multiple read ports — typically two — so that an instruction can read both of its source operands simultaneously. A two-read, one-write register file is the standard building block of a CPU datapath. Each read port has its own address input and its own multiplexer tree, making the ports independent. As register files grow (more registers or more ports), the multiplexer logic grows with them, which is why register files are kept small compared to caches or main memory. The tradeoff is clear: registers are the fastest storage in the machine, but their speed comes from being physically small, close to the ALU, and limited in number.