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Hybrid Logical Clocks

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Clock Synchronization and Network Time ProtocolLogical Clocks and Event Ordering+1 more→
clocks physical-time logical-time hybrid

Core Idea

Hybrid Logical Clocks (HLC) combine physical time and logical clocks: they advance with physical time (like NTP clocks) but increment logically when events are causally dependent, ensuring that if event A happens before event B in physical time, A's HLC is less than B's. This bounds the clock skew error while preserving causal ordering.

Explainer

From Lamport timestamps, you know how to assign logical clocks that respect causality: if event A happens before event B, then A's timestamp is less than B's. But Lamport timestamps are pure logical counters with no connection to wall-clock time — timestamp 42 tells you nothing about *when* an event occurred, only its position in the causal order. Physical clocks give you real time but suffer from clock skew — different machines' clocks drift apart, so you can't rely on physical timestamps for ordering. Hybrid Logical Clocks (HLC) solve this by combining both: they stay close to physical time while guaranteeing causal ordering.

An HLC timestamp has two components: a physical part (the best-known physical time) and a logical part (a counter that breaks ties). When a node generates a local event, it sets the physical part to the maximum of its current HLC physical part and its current wall-clock time, then resets the logical part to zero (if the physical part advanced) or increments it (if wall-clock time hasn't advanced past the stored physical part). When a node receives a message, it sets the physical part to the maximum of its own physical part, the sender's physical part, and its current wall-clock time, then sets the logical counter accordingly. This "max" rule ensures the physical part never goes backward and always reflects the most recent physical time any causally connected node has observed.

The result is a timestamp that is always within the clock skew bound of real physical time (typically milliseconds with NTP), and that also satisfies the Lamport clock property: if A happens before B, then HLC(A) < HLC(B). You compare HLC timestamps by comparing the physical part first, then the logical part as a tiebreaker. This gives you something neither pure logical clocks nor pure physical clocks can offer alone — you can use HLC timestamps for causal ordering *and* for approximate real-time queries like "show me all events from the last five minutes." The physical component is meaningful in human terms; the logical component handles the edge cases where physical time alone would give ambiguous or incorrect ordering.

HLCs are particularly valuable in distributed databases that need to implement snapshot isolation or causal consistency. Systems like CockroachDB and MongoDB use HLC-style timestamps to order transactions across nodes without requiring a centralized timestamp oracle. Because the physical part stays close to real time, the system can efficiently determine that a snapshot at time T includes all events with HLC timestamps ≤ T, with bounded error. If you've studied vector clocks, note the tradeoff: vector clocks capture the full causal structure (you can tell whether two events are concurrent), but their size grows with the number of nodes. HLCs are fixed-size (just two numbers) regardless of system scale, but they only tell you "A happened before B" or "we can't determine the order" — they don't explicitly represent concurrency. For systems where compact timestamps and physical time proximity matter more than full concurrency detection, HLCs are the practical choice.

Practice Questions 5 questions

Prerequisite Chain

Understanding Zero → The Number Zero → Counting to Five → Counting to 10 → Counting to 20 → Counting a Set of Objects Up to 20 → Cardinality: The Last Number Counted → Matching Numerals to Quantities → Subitizing Small Quantities → Addition Within 10 → Number Bonds to 10 → Addition Within 20 → Doubles and Near Doubles → Doubles Facts Within 10 → Near Doubles Facts Within 20 → Mental Math Strategies for Addition → Mental Math: Adding and Subtracting Tens → Addition Within 100 → Repeated Addition as Multiplication → Multiplication as Equal Groups → Multiplication: Arrays → Basic Multiplication Facts (0s, 1s, 2s, 5s, 10s) → Multiplication Facts Within 100 → Division as Equal Sharing → Division as Grouping (Measurement Division) → Division: Grouping (Repeated Subtraction) Model → Division: Fair Sharing Model → Division as Equal Sharing → Division as Grouping → Basic Division Facts → Division Facts Within 100 → Multiplication and Division Fact Families → Relationship Between Multiplication and Division → Division Facts as Inverse of Multiplication → Remainders and Quotients in Division → Division Word Problems → Multi-Step Word Problems → Solving Multi-Step Word Problems → Multiplication Word Problems → Division Word Problems → Introduction to Long Division → Factors and Multiples → Prime and Composite Numbers → Equivalent Fractions → Relating Fractions and Decimals → Decimal Place Value → Integers and the Number Line → Comparing and Ordering Integers → Absolute Value → Adding Integers → Subtracting Integers → Multiplying Integers → Introduction to Exponents → Order of Operations → Integer Order of Operations → Variable Expressions → The Distributive Property → Variables and Expressions Review → Introduction to Polynomials → Adding and Subtracting Polynomials → Multiplying Polynomials → Factorial → Permutations → Combinations → Counting Principles: Addition and Multiplication Rules → Introduction to Graph Theory → Propositional Logic Foundations → Logical Equivalences → Boolean Algebra → Boolean Type and Truth Values → Comparison Operators and Boolean Tests → Logical Operators and Boolean Algebra → Boolean Algebra and Fundamental Laws → Logic Gates Fundamentals → Implementing Boolean Functions with Gates → Karnaugh Map Simplification → Combinational Circuit Design → Flip-Flops and Latches → Binary Counters: Design and Analysis → Binary Arithmetic → Fixed-Point Number Representation → Two's Complement Representation → Overflow and Underflow Detection → Binary Adders: Half-Adders and Full-Adders → Full Adder and Carry Propagation → Carry Lookahead Adder Design → Half Adder Circuit Design → Multiplication Circuit Design → Sequential Circuit Design → Registers and Register Files → Instruction Set Architecture (ISA) → Kernel Architecture and OS Structure → System Calls and User/Kernel Mode → Processes and the Process Control Block → Logical Clocks and Event Ordering → Vector Clocks and Capturing Causality → Hybrid Logical Clocks

Longest path: 97 steps · 362 total prerequisite topics

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