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Software-Only Mutual Exclusion Solutions

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Critical Section Problem: Formal Definition→→Test-and-Set and Atomic Primitives
synchronization mutual-exclusion software

Core Idea

Peterson's and Dekker's algorithms solve the two-process critical section problem using only shared variables (flags, turn). While theoretically important, they are impractical on modern CPUs due to weak memory ordering; hardware support is essential in practice.

Explainer

From the critical section problem, you know the three requirements any solution must satisfy: mutual exclusion (at most one process in the critical section at a time), progress (if no process is in the critical section and some want to enter, one must be allowed in), and bounded waiting (no process waits forever). The challenge of software-only solutions is meeting all three requirements using nothing but ordinary shared variables — no special hardware instructions, no OS support, just reads and writes to memory.

Peterson's algorithm for two processes uses two shared variables: a boolean array `flag[2]` where `flag[i]` means "process i wants to enter," and a `turn` variable that breaks ties. When process 0 wants to enter, it sets `flag[0] = true` (announcing interest), then sets `turn = 1` (yielding priority to the other process), then waits in a loop while `flag[1] == true AND turn == 1`. The key insight is the combination: setting your flag shows intent, but setting turn to the *other* process's ID is an act of deference. If both processes try to enter simultaneously, both set their flags and both set turn — but turn can only hold one value, so whoever wrote to it *last* will be the one who waits. This guarantees mutual exclusion. Progress holds because a process only waits when the other is genuinely interested and has priority. Bounded waiting holds because after the other process exits and re-enters, it resets turn, giving priority back.

Dekker's algorithm is historically the first correct software solution, predating Peterson's. It uses the same flag array but handles tie-breaking differently — the losing process must retract its flag, wait, then re-announce interest. Peterson's algorithm is simpler and more elegant, which is why it is the version taught in most courses. Both algorithms extend the failed attempts you may have seen: using just a turn variable (violates progress — a process that does not want to enter blocks the other), or using just flags without turn (allows both to enter simultaneously if they set flags at the same time).

The fatal limitation of these algorithms on modern hardware is memory reordering. Modern CPUs and compilers aggressively reorder reads and writes for performance. Peterson's algorithm depends on a specific ordering: the flag write must become visible to the other process *before* the turn read. If the CPU reorders these operations, both processes can read stale values and both enter the critical section — mutual exclusion breaks. This is not a theoretical concern; it happens reliably on x86, ARM, and other architectures. To fix this, you would need memory barriers (fence instructions) — but those are hardware support, which defeats the purpose of a software-only solution. This is why Peterson's and Dekker's algorithms are taught for their theoretical elegance in proving that mutual exclusion *can* be solved without hardware support, while real systems use atomic instructions like test-and-set, compare-and-swap, or OS-provided synchronization primitives.

Practice Questions 5 questions

Prerequisite Chain

Understanding Zero → The Number Zero → Counting to Five → Counting to 10 → Counting to 20 → Counting a Set of Objects Up to 20 → Cardinality: The Last Number Counted → Matching Numerals to Quantities → Subitizing Small Quantities → Addition Within 10 → Number Bonds to 10 → Addition Within 20 → Doubles and Near Doubles → Doubles Facts Within 10 → Near Doubles Facts Within 20 → Mental Math Strategies for Addition → Mental Math: Adding and Subtracting Tens → Addition Within 100 → Repeated Addition as Multiplication → Multiplication as Equal Groups → Multiplication: Arrays → Basic Multiplication Facts (0s, 1s, 2s, 5s, 10s) → Multiplication Facts Within 100 → Division as Equal Sharing → Division as Grouping (Measurement Division) → Division: Grouping (Repeated Subtraction) Model → Division: Fair Sharing Model → Division as Equal Sharing → Division as Grouping → Basic Division Facts → Division Facts Within 100 → Multiplication and Division Fact Families → Relationship Between Multiplication and Division → Division Facts as Inverse of Multiplication → Remainders and Quotients in Division → Division Word Problems → Multi-Step Word Problems → Solving Multi-Step Word Problems → Multiplication Word Problems → Division Word Problems → Introduction to Long Division → Factors and Multiples → Prime and Composite Numbers → Equivalent Fractions → Relating Fractions and Decimals → Decimal Place Value → Integers and the Number Line → Comparing and Ordering Integers → Absolute Value → Adding Integers → Subtracting Integers → Multiplying Integers → Introduction to Exponents → Order of Operations → Integer Order of Operations → Variable Expressions → The Distributive Property → Variables and Expressions Review → Introduction to Polynomials → Adding and Subtracting Polynomials → Multiplying Polynomials → Factorial → Permutations → Combinations → Counting Principles: Addition and Multiplication Rules → Introduction to Graph Theory → Propositional Logic Foundations → Logical Equivalences → Boolean Algebra → Boolean Type and Truth Values → Comparison Operators and Boolean Tests → Logical Operators and Boolean Algebra → Boolean Algebra and Fundamental Laws → Logic Gates Fundamentals → Implementing Boolean Functions with Gates → Karnaugh Map Simplification → Combinational Circuit Design → Flip-Flops and Latches → Binary Counters: Design and Analysis → Binary Arithmetic → Fixed-Point Number Representation → Two's Complement Representation → Overflow and Underflow Detection → Binary Adders: Half-Adders and Full-Adders → Full Adder and Carry Propagation → Carry Lookahead Adder Design → Half Adder Circuit Design → Multiplication Circuit Design → Sequential Circuit Design → Registers and Register Files → Instruction Set Architecture (ISA) → Kernel Architecture and OS Structure → System Calls and User/Kernel Mode → Processes and the Process Control Block → Process Creation: fork() and exec() → Process Termination and Resource Cleanup → Process States and State Transitions → Process Model Formalization → Context Switching and CPU Dispatch → CPU Scheduling Fundamentals → Round-Robin (RR) Scheduling → First-Come-First-Served (FCFS) Scheduling → Scheduling Fairness and Starvation Prevention → Thread Scheduling and Coordination → Critical Section Problem: Formal Definition → Software-Only Mutual Exclusion Solutions

Longest path: 106 steps · 412 total prerequisite topics

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