Memory Organization and Addressing

Core Idea

Memory in a computer system is organized as an array of addressable locations, each identified by a unique binary address. The address space size is determined by the address bus width: a 32-bit address bus can address 2³² ≈ 4 GB. Memory is typically byte-addressable, meaning each address refers to one byte even when words are larger. Byte ordering (endianness) determines whether multi-byte values store the most significant byte at the lowest address (big-endian) or highest address (little-endian), affecting data interchange and debugging.

How It's Best Learned

Draw a memory map of a small address space and identify regions for code, data, and stack. Compare big-endian and little-endian storage of a 4-byte integer. Examine how array indexing translates to memory addresses in a low-level language like C.

Common Misconceptions

• Memory addresses in programs are not physical hardware locations; modern systems use virtual addresses translated to physical addresses by hardware.
• Byte-addressable memory does not mean every byte is independently accessed — processors typically read and write full words at aligned addresses for efficiency.

Explainer

Every value your program works with — variables, instructions, arrays — lives somewhere in memory. To fetch or store that value, the hardware needs a way to identify exactly where "somewhere" is. Memory organization is the system that makes this possible: it defines what an address is, how large the address space is, and how multi-byte values are laid out.

The fundamental model is an array. Memory is a sequence of byte-sized slots, each assigned a unique binary number called an address, starting at 0 and going up to the maximum the hardware supports. The address bus — a set of wires connecting the processor to the memory system — carries these binary addresses. If the address bus is n bits wide, it can represent 2ⁿ distinct addresses, so it can address up to 2ⁿ bytes. A 32-bit address bus (as in older x86 processors) gives 2³² = 4 GB; a 64-bit bus gives 2⁶⁴ bytes, an astronomically large space that no current machine comes close to populating. This is why upgrading a system from a 32-bit operating system to 64-bit allowed it to use more than 4 GB of RAM — the old addressing scheme simply ran out of room.

The term byte-addressable means that the finest granularity you can name is a single byte. Each byte has its own address, even though the data you care about (integers, floats, pointers) typically spans 4 or 8 bytes. When you declare `int x` in C on a 32-bit system, x occupies four consecutive byte addresses. Which byte goes first? That depends on endianness. In a little-endian system (x86, ARM by default), the least significant byte is stored at the lowest address — the "little end" comes first. In a big-endian system (network byte order, some RISC architectures), the most significant byte comes first. For the 32-bit value 0x12345678 at address 0x1000: little-endian stores 78, 56, 34, 12 at addresses 0x1000 through 0x1003; big-endian stores 12, 34, 56, 78. Within a single machine this is invisible, but when programs exchange binary data with other systems — over a network, through a shared file — endianness must be explicitly handled.

Despite memory being byte-addressable, processors do not typically read one byte at a time. The data bus between processor and memory is 32 or 64 bits wide, and hardware reads a full word per cycle. When you access a single byte, the processor loads the containing word, extracts the byte, and discards the rest. For this to work cleanly, most processors prefer or require aligned accesses: a 4-byte integer should start at an address divisible by 4. An unaligned integer (e.g., at address 0x1001) would straddle two aligned words, requiring two memory reads and bit-shifting to assemble — some architectures handle this automatically but slowly; others raise a hardware exception. This is why C compilers insert padding bytes between struct fields: to keep each field aligned.

The addresses your program sees are virtual addresses — numbers produced by the compiler and used by your code. The hardware's memory management unit (MMU) translates these to physical addresses — actual locations in the RAM chips — using a page table maintained by the operating system. This indirection is invisible during normal execution but becomes visible in system programming, memory-mapped I/O, and debugging. Understanding virtual versus physical addressing is the entry point to cache design, virtual memory, and operating system memory management — all of which build directly on the byte-addressable array model introduced here.